This project implements the FFT algorithm on the Spartan 3E FPGA (Papillio One Platform) which in turn is used as a spectrum analyzer with some added hardware (e.g. ADC).
Verilog is used as the Hardware Description Language.
Code and Testbench at EDA Playground: https://www.edaplayground.com/x/JMu
Demo: https://youtu.be/rpNE2jmLzJo
